As mentioned in my introductory post on the 2nd Chipnation Congress, I will be sharing my thoughts on some of the talks I enjoyed there. In this post I will be talking about the presentation of the current status of SOHA, carried out by 2 of the original partners of this alliance:
Mr Antonio Rubio, Full Professor and Chip Chair Director at the Polytechnical University of Catalonia (UPC).
Mr Antonio Núñez, Senior Fellow Emeritus at the Polytechnical University of Las Palmas de Gran Canaria and Founder of the University Institute of Advanced Microelectronics (IUMA).
Mr Rubio began showing the motivation and current status of the Spanish Open Hardware Alliance (SOHA), an alliance with national and international expansion vocation open to the whole ecosystem involved/interested in developing open hardware solutions in the ICT field, including the industry and the public sector, e.g., private companies, universities, scientific societies, institutes, research agencies, and government agencies and institutions with the capacity and willingness to promote open design practices.
As of today (2024, December), it counts with 29 Universities, and 3 Research Centres active in open hardware, softwar and firmware development which shows the wide spread across Spain’s territory (see current partners here). They are (at least currently) focused on the RISC-V ecosystem, which is kind of an obsession in the whole EU (btw, I find it a bit limiting, both on SOHA and on the PERTE Chip strategy, to focus on just one HW architecture/ISA, no matter how flexible and promising it is, as there are other interesting initiatives out there that deserve some attention, (e.g., OpenPOWER), and because you might bias the full community to work on one single direction, developing alternatives-blindness).
After introducing the actual status of the associations and some bureaucratic nuances they have suffered initially, he recognised that after experiencing the dusk and dawn of the microelectronics sector in Spain a few times already, now the situations seems optimal, as:
On the technology side, the degree of reliability is very high, and consolidated for nodes over 3nm, and highly reliable and economic over 45nm.
On the design software side, we count with sophisticated CAE tools that allow reliable designs not just on the electronic functional aspects, on the application side, but also, e.g., regarding thermal design, EMC compliance or signal integrity, to name a few.
On the skills side, all universities are starting new masters and expert courses in all microelectronics and semiconductors related disciplines.
On the applications side, we have big markets demanding solutions, such as IoT, drones, Automotive, AI/ML.
A growing and mature ecosystem around the open and flexible RISC-V architecture.
More importantly, all policy makers EU- and ES-wide are aware of the importance of achieving a minimum degree of sovereignty in the microelectronics and semiconductor sector, and have committed substantial budget to support local initiatives.
Mr Rubio showed the advantages of open and highly modular architectures such as RISC-V, that allow for adaptations to all sort of applications and a high-level of design freedom. A workload-designed silicon that upon a thorough profiling of the application specific workload, and the identification of bottlenecks, allows for producing an optimised hw-sw architecture for the intended application, e.g., power vs performance vs area, multi-sector: from tiny edge IoT devices, to processors for high-performance computing applications, etc.
However, he mentioned that these advantages are not enough. Even if all countries and regions have initiated efforts to foster the creation and development of strong ecosystems around RISC-V, as is the case of Brazil, China, USA, he brought attention to the importance of counting with strong alliances that bring together all stakeholders in the value chain, as the key to success, as is the case of the EU and, not surprisingly, China, as we can see in the figure below. This is the role that SOHA can and must play in Spain.
He concluded claiming that it is key to count with an alliance in Spain, that brings together the key stakeholders, no matter the region they are in (I guess he referred to the potential risk to end up with just a few powerful regional silos, instead of leveraging the strengths of all Spanish regions). The figure below shows the regional presence SOHA members in Spain as of today.
Finally, after presenting an overview of the actions carried out since SOHA inception, he claim the attention to the fact that SOHA is nothing else than the sum of their members. As such, he claimed that SOHA could be seen as the one-stop shop for all RISC-V related activities of its members, and he concluded his presentation enumerating some of the more significant actions carried out or foreseen so far, in three different dimensions: Skills (Education, Training, RDI), Technology ecosystem (VLSI design tools, Open libraries / IP cores, Software stack), and Ecosystem coordination (Networking events, Trade fairs, Congresses), e.g.:
Open Hardware Education:
University level:
PERTE Chip Chairs
Degrees, Masters, starting in 2024
Semiconductor Technology Training International Workshop (2025)
Winter schools (from RISC-V Network)
Open Hardware vocational and high-school training, starting in 2024.
Open Hardware RDI:
Participation in international conferences (DCIS, ISCAS, ISCA)
SS in IEEE Nano 2024: “Advanced low-power open and neuromorphic architectures”.
SS in IEEE Nano 2025
DRAC project
Technology ecosystem:
Open EDA tools, Open SDK: Participation in international open platforms: Synopsis, Cadence, CERN, Fraunhofer, IMEC.
Inventory of IP cores, Designers club: Call to action to create IPs libraries and design best practices.
Ecosystem coordination:
National Strategy Network
Competence Centre participation: MicroNanoSpain.
Spanish RISC-V (SRISC) initiative:
Foster skills training in academy and industry
Accelerate RISC-V adoption in the industry
Foster the creation of a national IP cores & common resources database.
It was Mr Antonio Núñez, who began his speech describing the actions carried out in the context of the Spanish RISC-V (SRISC) initiative (see last bulle, in the list above. He emphasised that one of the motivations for creating SOHA, was that, as a private organisation, they are able to buy and distribute resources (e.g., RISC-V kits) rapidly enough. An apparently trivial task, but that for a public university means huge bureaucratic procedures that hurts effectiveness.
The goal of SRISC is simple. The main objective is developing a common and fully open platform around a SoC based on an open RISC-V Core (currently the “Sargantana” RISC-V processor designed by the BSC). This platform will facilitate the integration and testing of any design carried out by any one at, e.g., universities, high-schools, maker, or company. The rest of IP cores needed (e.g., memory controllers, PLL, PCIe), will be provided by third parties. The idea they are trying to push forward is negotiating with these 3rd parties, so that they grant an educational purpose restricted license, to facilitate the platform use in the academia.
The current status of the platform is very promising, as it has been built around elements that have been used extensively in the academic community for a number of years now:
European Laboratory for Open Computer Architecture (LOCA). LOCA’s mission is to design and develop energy efficient and high performance chips, based on open architectures like RISC-V, OpenPOWER, and MIPS, in Europe, for use within future exascale supercomputers and other high performance domains.
Open-sourced components, as of december 2024:
Sargantana processor
OpenPiton parametric cache block size
HPDC integration in OpenPiton
Sauria (systolic array for automotive)
Performance Monitoring Unit (PMU) for real-time systems
MEEP shell for fast FPGA prototyping
Other components coming soon:
Linux/FPGA support in Sargantana
Multicore processor based on Sargantana + HPDC + OpenPiton
Lagarto Hun (5-stages)
Other domain-specific accelerators
He emphasised, that a specific goal is that all IP cores uploaded will be required to be verified, so that you can build trust on the community around the platform, as a high level of confidence will be needed to attract the industry.
He then shared a parallel effort carried out by his group, where they have been working on since 2017 on the synthesis of a RISC-V open processor from Rocket Chip on a Xilinx Zynq based platform, and lately a more complex architecture of 32/64 bits based on the CVA6 core with MMU support, that allows running an standard Linux OS, and that was synthesised on a FPGA.
The CVA6 ASIC counts with 500K gates running at 200-400MHz, and a RTL syntheis was already produced for TSMC 65nm CMOS technology process, and they are currently working on the migration to 28nm node size.
Mr Núñez concluded stressing a few messages:
SOHA aspires to become a bridge among stakeholders.
SOHA has a strong willingness to collaborate with the whole ecosystem, included promising interesting actions such as MicroNanoSpain, the Design Enabling Teams action, Chip Chairs, etc.
It is key, for SOHA success, to ensure building a solid and reliable knowledge base that is useful for both the academia and the industry, and where each IP Core in the database, has been thoroughly verified and documented to build trust.
Finally, inspired by the Chips JU strategy:
Extend the focus beyond the chip, to the whole ecosystem (e.g, provide also toolchains, support to different OS, etc.
Produce specific applications for each sector of strategic importance (e.g., energy, supercomputing, AI/ML, Automotive, IoT, Health, etc.).
TAKEAWAYS.-
Summary: Mr Antonio Rubio, and Mr Antonio Núñez, two of the founding partners of the newly born (2024/11) Spanish Open Hardware Association (SOHA), presented the status of this alliance, with over 30 members already (29 universities and 3 research centres). This association has already demonstrated a broad national presence and aspires to unite the Spanish open hardware ecosystem around the RISC-V architecture, including industry, academia, and government, fostering open design practices in both academia and industry.
Insights:
SOHA is nothing else than the sum of their members: it can be seen as the one-stop shop for all RISC-V related activities of its members.
Open hardware alliances are crucial for fostering innovation by bringing together diverse stakeholders and promoting collaborative development practices.
The development of open platforms with verified, documented, and reliable IP cores is vital for building trust and accelerating the adoption of open hardware.
Bureaucratic inefficiencies in public institutions can hinder progress, emphasizing the value of private organizations such as SOHA to facilitate certain actions, such as distributing training kits, or negotiating IPRs, educational licenses, etc.
A holistic approach, extending beyond chips to include toolchains and OS support, is necessary for a thriving open hardware ecosystem.
Strategic applications of open hardware in key sectors are crucial for achieving technological sovereignty and addressing societal needs.
Creating a robust knowledge base and facilitating easy access to resources is essential for the growth of the open hardware community, but the success of open hardware initiatives relies heavily on ensuring an active participation and contributions of all its members.
Strong alliances are key to the development of RISC-V ecosystems, fostering national and international collaboration and resource sharing among national stakeholders.
Recommendations:
Imho, SOHA should actively explore alternative hardware architectures beyond RISC-V (e.g., MIPS, OpenPOWER, already supported in LOCA) to avoid becoming short-sighted.
Imho, the message that SOHA is nothing else that the sum of its member, is limiting. It can be much more than that, if we aspire to break current regional siloes. As a national-level alliance it should also aspire to be the voice of the ecosystem at international level, and a cohesive force that strengthens and joins the whole community.
SOHA can be the right instrument to ensure an active engagement with the rest of the value chain stakeholders, so that the open hardware solutions meet real-world needs and, in doing so, develop branches fully adapted to the needs of each vertical, e.g., developing specific applications for key sectors to ensure societal impact and technological advancement, but it needs to define who would be responsible for this.
SOHA can play a key role building a solid, reliable and complete technology platform, as they can leverage the sum of the strengths of all its members to be in a better position to negotiate educational licenses for all IP cores to promote wider academic adoption and accelerate the learning process, but it needs to define who would be responsible for this.
SOHA can play a leading role to foster the creation of a well-documented and verified national IP cores and common resources database for the community to build upon, but it needs to define who would be responsible for this.
SOHA can play a key role to foster the adoption of RISC-V in the industry through training, resources and best practices, but it needs to define who would be responsible for this.
SOHA can play a critical role ensuring an active participation of all its members to foster collaboration and knowledge sharing across the community, including the participation in international conferences to stay at the forefront of RDI, but it is not clear who would be responsible for this.
As per last 5 points (and others I might have missed), it seems critical that SOHA defines as soon as possible a funnel with a first set of the critical actions they must execute to ensure the alliance success, designating specific responsible for each of them, so that they can start defining, implementing, evaluating and improving the related processes.
DISCLAIMER: My views are my own: partial, subjective, biased and, unfortunately, not immune to mistakes nor misunderstandings on my side. In no way I pretend to be accurate in my interpretation, so please, check the original recording provided and feel free to disagree!
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